PSoC and other *mixed-signal* MCUs: adapt your analog signals inside the chip and accelerate design

Introduction

In sensor electronics, the boundary between the analog and digital worlds is usually bridged with external circuitry: op-amps, instrumentation amplifiers, dedicated ADCs, active filters… However, mixed-signal microcontroller families—such as Infineon PSoC, certain STM32F3 devices, or the new PICs with Configurable Logic Blocks (CLB)—integrate reconfigurable analog and digital blocks right inside the package. These blocks range from rail-to-rail op-amps and PGAs to 20-bit ΔΣ ADCs and hardware digital filters. The result is an architecture that can cut the bill of materials by up to 35 % and compress weeks of validation by moving the analog front-end into firmware.

Why is it essential to condition analog signals?

1. Impedance and isolation

Bridge sensors or thermistors present kilo-ohm impedances; if connected to the ADC without buffering, the converter’s load distorts the measurement. A high-impedance internal op-amp keeps the signal intact.

2. Gain and resolution

When a sensor excursion spans only a fraction of the ADC range, each LSB represents too many microvolts and quantization dominates noise. Amplifying the signal to fill the full dynamic range spreads the same quantization error over more levels and increases the Effective Number of Bits (ENOB); every 6.02 dB of SNR improvement equals one additional bit of resolution.
Example: a Wheatstone bridge outputs ±20 mV and the ADC accepts ±2 V; with ×100 gain the signal goes from occupying 2 % to 100 % of full-scale, gaining ≈ 4 effective bits without changing the converter.

3. Noise rejection and filtering

Sensor lines act as 50/60 Hz antennas. A differential amplifier followed by on-chip SC/CT filters and hardware decimators suppresses the common-mode component before conversion.

4. Range and reference adjustment

Stable internal references (e.g., 1.024 V) let you scale the signal inside the chip, maximizing the ADC’s usable window and guaranteeing thermal accuracy without external parts.

Mixed-signal analog architecture (generic overview)

Modern mixed-signal MCUs operate between 1.7 and 5.5 V, allowing 5 V sensor excitation and 3.3 V logic communication without level-shifters.

Detailed example: Wheatstone-bridge scale (PSoC 5LP)

Below is how to build a 10 kg scale with a practical ±2 g resolution without an external amplifier or HX711 module, using the CY8CKIT-048 or CY8CKIT-059, a standard 1 kΩ load cell, and the free PSoC Creator IDE.

Step-by-step design flow

1. Ratiometric excitation

   • Power the bridge directly with the PSoC’s 5 V.
   • In the System panel set Vddio = 5 V so the analog I/Os operate at that level.

2. Differential amplification

   • Drag a PGA component onto the schematic, set it to Differential mode, and choose gain ×128 to bring the bridge’s ±20 mV to about ±2.56 V.

3. Offset cancellation

   • Insert a 2-position AMux that toggles the PGA inputs each conversion.
   • Firmware subtracts successive readings (chopping), cancelling the op-amp’s offset error.

4. ADC conversion

   • Add a 20-bit ΔΣ ADC and set the rate to 240 samples/s.
   • Enable the ×64 internal decimator; averaging 64 samples yields ≈ 16 ENOB—enough for ±2 g over 10 kg.

5. Calibration and tare

   • Store calibration coefficients in the chip’s flash.
   • Use DMA to dump ADC readings to a buffer without CPU load and apply tare in firmware.

Result

• Capacity: 10 kg
• Practical resolution: ±2 g
• Prototyping time: < 1 h (no external amplifier soldered)

All conditioning—excitation, amplification, filtering, and conversion—occurs inside the microcontroller, freeing PCB area and simplifying certification.

You can read more about this project here

Recommended PSoC boards to get started

Quick takeaway: all these boards include op-amps, PGAs, and at least one ΔΣ ADC, eliminating the need for external modules in precision-sensor prototypes.

Conclusion

Integrated analog peripherals let you measure, filter, and condition signals inside the MCU, cutting the BOM and speeding time-to-market. Real projects show -35 % in component cost and -40 % in time-to-market compared to discrete architectures.

Did you know some MCUs can also create custom digital peripherals via CLB or CLC? In the next article we’ll see how to implement complex discrete logic inside the microcontroller to remove even more external hardware.

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